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System-on-Chip Design of the Whirlpool Hash Function

System-on-Chip Design of the Whirlpool Hash Function
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Author(s): Paris Kitsos (Hellenic Open University (HOU), Patras, Greece)
Copyright: 2008
Pages: 15
Source title: Handbook of Research on Wireless Security
Source Author(s)/Editor(s): Yan Zhang (Simula Research Laboratory, Norway), Jun Zheng (City University of New York, USA) and Miao Ma (National Institute of Information & Communications Tech, Singapore)
DOI: 10.4018/978-1-59904-899-4.ch017


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In this chapter, a system-on-chip design of the newest powerful standard in the hash families, named Whirlpool, is presented. With more details an architecture and two very large-scale integration (VLSI) implementations are presented. The first implementation is suitable for high speed applications while the second one is suitable for applications with constrained silicon area resources. The architecture permits a wide variety of implementation tradeoffs. Different implementations have been introduced and each specific application can choose the appropriate speed-area, trade-off implementation. The implementations are examined and compared in the security level and in the performance by using hardware terms. Whirlpool with RIPEMD, SHA-1, and SHA-2 hash functions are adopted by the International Organization for Standardization (ISO/IEC, 2003) 10118-3 standard. The Whirlpool implementations allow fast execution and effective substitution of any previous hash families’ implementations in any cryptography application.

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