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Accelerating Sobel Edge Detection Using Compressor Cells Over FPGAs
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Author(s): Ahmed Abouelfarag (AASTMT, Egypt), Marwa Ali Elshenawy (AASTMT, Egypt)and Esraa Alaaeldin Khattab (AASTMT, Egypt)
Copyright: 2017
Pages: 21
Source title:
Smart Technology Applications in Business Environments
Source Author(s)/Editor(s): Tomayess Issa (Curtin University, Australia), Piet Kommers (University of Twente, The Netherlands), Theodora Issa (Curtin University, Australia), Pedro Isaías (Portuguese Open University, Portugal)and Touma B. Issa (Murdoch University, Australia)
DOI: 10.4018/978-1-5225-2492-2.ch001
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Abstract
Recently, computer vision is playing an important role in many essential human-computer interactive applications, these applications are subject to a “real-time” constraint, and therefore it requires a fast and reliable computational system. Edge Detection is the most used approach for segmenting images based on changes in intensity. There are various kernels used to perform edge detection, such as: Sobel, Robert, and Prewitt, upon which, the most commonly used is Sobel. In this research a novel type of operator cells that perform addition is introduced to achieve computational acceleration. The novel operator cells have been employed in the chosen FPGA Zedboard which is well-suited for real-time image and video processing. Accelerating the Sobel edge detection technique is exploited using different tools such as the High-Level Synthesis tools provided by Vivado. This enhancement shows a significant improvement as it decreases the computational time by 26% compared to the conventional adder cells.
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