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Spread Spectrum Watermarking: Implementation in FPGA

Spread Spectrum Watermarking: Implementation in FPGA
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Author(s): Santi P. Maity (Bengal Engineering and Science University, India)
Copyright: 2013
Pages: 30
Source title: Digital Rights Management: Concepts, Methodologies, Tools, and Applications
Source Author(s)/Editor(s): Information Resources Management Association (USA)
DOI: 10.4018/978-1-4666-2136-7.ch026

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Abstract

Spread spectrum (SS) watermarking has proven to be efficient, robust and cryptographically secure. Each bit of watermark information is embedded over wide spectrum of the host signal based on spectrum spreading concept of SS modulation in digital communication and can easily be integrated with many existing data transmission scheme. This has made SS watermarking method more attractive during recent times for many non-conventional applications such as broadcast monitoring, security in communication, authentication and blind assessment of quality of services (QoS) for multimedia signals in mobile radio network. These applications essentially demand development of low cost algorithms so that they can be implemented on real time system through hardware realization. Hardware realization offers advantages over software realization in terms of less area, low execution time, low power, real-time performance, high reliability and also ease of integration with existing consumer electronics devices. This chapter first presents a brief review on hardware implementation of digital watermarking algorithms, followed by development of hardware architecture for spatial domain and fast Walsh transform (FWT) domain SS watermark system design using field programmable gate array (FPGA). A brief sketch on hardware implementation for biorthogonal wavelet based Hilbert transform is also shown that may be extended to design SS watermarking based on the concept of two previous architectures. Few challenges for hardware design of watermarking algorithms are then mentioned with an objective to give an idea how to develop watermarking algorithms so that it can be implemented on hardware. The chapter ends with few open research problems on hardware architecture as scope of future research work.

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