A Hardware Immune System for MC8051 IP Core

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Author(s): Xin Wang (University of Science and Technology of China, China), Wenjian Luo (University of Science and Technology of China, China), Zhifang Li (University of Science and Technology of China, China)and Xufa Wang (University of Science and Technology of China, China)
Copyright: 2009
Pages: 18
Source title: Handbook of Research on Artificial Immune Systems and Natural Computing: Applying Complex Adaptive Technologies
Source Author(s)/Editor(s): Hongwei Mo (Harbin Engineering University, China)
DOI: 10.4018/978-1-60566-310-4.ch015

Keywords: Biologically-Inspired Computing / Medical Information Science Reference / Medical Technologies / Medicine & Healthcare

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Abstract

A hardware immune system for the error detection of MC8051 IP core is designed in this chapter. The binary string to be detected by the hardware immune system is made from the concatenation of the PC values in two sequential machine cycles of the MC8051. When invalid PC transitions occurred in the MC8051, the alarm signal of the hardware immune system can be activated by the detector set. The hardware immune system designed in this chapter is implemented and tested on an FPGA development board, and the result is given in waveforms of the implemented circuits. The disadvantages and future works about the system are also discussed.

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A Hardware Immune System for MC8051 IP Core

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